M30222 Datasheet, PDF (64/237 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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Specifications in this manual are tentative and subject to change
MITSUBISHI MICROCOMPUTERS
M30222 Group
Rev. G
Direct Memory Access Controller
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(1) 8-bit transfers
16-bit transfers from even address and the source address is even.
BCLK
Address
bus
CPU use
Source Destination Note 2
CPU use
RD
WR
Data
bus
CPU use
Source Destination Note 2
CPU use
(2) 16-bit transfers and the source address is odd
BCLK
Address
bus
RD
WR
Data
bus
CPU use
CPU use
Source Source + 1 Destination Note 2
Source Source + 1 Destination _{Note 2}
CPU use
CPU use
(3) One wait is inserted into the source read under the conditions in (1)
BCLK
Address
bus
CPU use
Source
Destination Note 2
RD
WR
Data
bus
CPU use
Source
Destination Note 2
CPU use
CPU use
(4) One wait is inserted into the source read under the conditions in (2)
BCLK
Address
bus
RD
WR
Data
bus
CPU use
CPU use
Source
Source + 1
Destination Note 2
CPU use
Source
Source + 1
Destination Note 2
CPU use
Note 1: The same timing changes occur with the respective conditions at the destination as at the source.
Note 2: This cycle may be added depending on the instruction queue.
Fig. 1.43. Example of the transfer cycle for a source read
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