M30222 Datasheet, PDF (45/237 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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Specifications in this manual are tentative and subject to change
MITSUBISHI MICROCOMPUTERS
M30222 Group
Rev. G
Overview of Interrupts
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
The operation of saving registers carried out in the interrupt sequence is dependent on whether the content of
the stack pointer, at the time of acceptance of an interrupt request, is even or odd. If the content of the stack
pointer (Note) is even, the content of the flag register (FLG) and the content of the program counter (PC) are
saved, 16 bits at a time. If odd, their contents are saved in two steps, 8 bits at a time. Figure 1.27 shows
the operation of the saving registers.
Note: When any INT instruction in software number 32 to 63 is executed, the stack pointer is indicated by the
U Flag, otherwise, it is the interrupt stack pointer (ISP)
(1) Stack pointer (SP) contains even number
Address
Stack area
Sequence in which order
registers are saved
[SP] – 5 (Odd)
[SP] – 4 (Even)
Program counter (PC L)
[SP] – 3(Odd)
Program counter (PC M)
[SP] – 2 (Even)
Flag register (FLG L)
[SP] – 1(Odd)
[SP] (Even)
Flag register
(FLGH)
Program
counter (PCH)
(2) Saved simultaneously,
all 16 bits
(1) Saved simultaneously,
all 16 bits
Finished saving registers
in two operations.
(2) Stack pointer (SP) contains odd number
Address
Stack area
Sequence in which order
registers are saved
[SP] – 5 (Even)
[SP] – 4(Odd)
Program counter (PC L)
[SP] – 3 (Even)
Program counter (PC M)
[SP] – 2(Odd)
Flag register (FLG L)
[SP] – 1 (Even)
[SP] (Odd)
Flag register Program
(FLGH)
counter (PCH)
(3)
(4) _{Saved simultaneously,}
all 8 bits
(1)
(2)
Finished saving registers
in four operations.
Note: [SP] denotes the initial value of the stack pointer (SP) when interrupt request is acknowledged.
After registers are saved, the SP content is [SP] minus 4.
Figure 1.27. Operation of saving registers
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