M30222 Datasheet, PDF (148/237 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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Specifications in this manual are tentative and subject to change
MITSUBISHI MICROCOMPUTERS
M30222 Group
Rev. G
LCD Drive Control Circuit
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
LCD mode register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
LCDM
Address
012016
When reset
0X0000002
Bit symbol
Bit name
LCDT0
LCDT1
Duty ratio select bit
BIAS
Bias control bit
LCDEN
LCD enable bit
PUMP
Voltage multiplier
control bit
Function
RW
b1 b0
0 0 : Not used
0 1 : 2 duty (use COM0, COM1)
1 0 : 3 duty (use COM0 - COM2)
1 1 : 4 duty (use COM0 - COM3)
0 : 1/3 bias
1 : 1/2 bias
0 : LCD Off
1 : LCD On
0 : Voltage multipler disable
1 : Voltage multipler enable (Note 2)
LRAMOUT LCDRAM output bit
0 : LCD waveform output
1 : LCD data output
Nothing is assigned. Write "0" when writing to this bit.
When read, the value is indeterminate.
LSRC
LCDCK count source
select bit (Note 1)
0 : f32
1 : fc1
Note 1: LCDCK is a clock for an LCD timing controller.
Note 2: When voltage multiplier is enabled, bias control bit must be "0".
Segment output enable register
b7 b6 b5 b4 b3 b2 b1 b0
Symbol
SEG
Address
012216
When reset
0016
__
Bit symbol
Bit name
SEG00
SEG01
SEG02
SEG03
Segment output
enable bit 0
Segment output
enable bit 1
Segment output
enable bit 2
Segment output
enable bit 3
SEG04
Segment output
enable bit 4
SEG05
SEG06
SEG07
Segment output
enable bit 5
Segment output
enable bit 6
LCD output
enable
Function
0 : I/O ports P30 to P32
1 : Segment output SEG 24 to SEG26
0 : I/O ports P33
1 : Segment output SEG 27
0 : I/O ports P35 to P34
1 : Segment output SEG 28 to SEG29
0 : I/O ports P37 to P36
1 : Segment output SEG 30 to SEG31
RW
0 : I/O ports P4 0 to P43
1 : Segment output SEG 32 to SEG35
0 : I/O ports P44 to P45
1 : Segment output SEG 36 to SEG37
0 : I/O ports P46 to P47
1 : Segment output SEG 38 to SEG39
0 : Disable
1 : Enable
LCD frame frequency counter
b7
b0
Symbol
LCDTIM
Address
012416
When reset
Indeterminate
Function
8 bit timer
Values that can be set
0016 to FF16 (Note)
Note: This register must be changed while LCD output enable bit is "0".
Fig. 1.118. LCD related registers (1)
RW
X
1-149