M30222 Datasheet, PDF (135/237 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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MITSUBISHI MICROCOMPUTERS
Specifications in this manual are tentative and subject to change
M30222 Group
Rev. G
UART2 in I²C Mode
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
3 to 6 cycles < duration for setting-up (Note 2)
3 to 6 cycles < duration for holding (Note 2)
Note 1 : When the start/stop condition count bit is "1" .
Note 2 : "Cycles" is in terms of the input oscillation frequency f(Xin) of the main clock.
SCL
SDA
(Start condition)
SDA
(Stop condition)
Duration for
setting up
Duration for
holding
Fig. 1.108. Timing characteristics of detecting the start condition and the stop condition (Note1)
Bit 3 of the UART2 special mode register 2 (address 037616) is used as the SDA output stop bit.
Setting this bit to “1” causes an arbitration loss to occur, and the SDA pin turns to high-impedance
state the instant when the arbitration loss detection flag is set to “1”.
Bit 1 of the UART2 special mode register 2 (address 037616) is used as the clock synchronization bit.
With this bit set to “1” at the time when the internal SCL is set to “H”, the internal SCL turns to “L” if the
falling edge is found in the SCL pin; and the baud rate generator reloads the set value, and start
counting within the “L” interval. When the internal SCL changes from “L” to “H” with the SCL pin set to
“L”, stops counting the baud rate generator, and starts counting it again when the SCL pin turns to “H”.
Due to this function, the UART2 transmission-reception clock becomes the logical product of the
signal flowing through the internal SCL and that flowing through the SCL pin. This function operates
over the period from the moment earlier by a half cycle than falling edge of the UART2 first clock to
the rising edge of the ninth bit. To use this function, choose the internal clock for the transfer clock.
Bit 2 of the UART2 special mode register 2 (037616) is used as the SCL wait output bit. Setting this bit
to “1” causes the SCL pin to be fixed to “L” at the falling edge of the ninth bit of the clock. Setting this
bit to “0” frees the output fixed to “L”.
Bit 4 of the UART2 special mode register 2 (address 037616) is used as the UART2 initialization bit.
Setting this bit to “1”, and when the start condition is detected, the microcomputer operates as follows.
(1) The transmission shift register is initialized, and the content of the transmission register is transferred to
the transmission shift register. This starts transmission by dealing with the clock entered next as the first bit.
The UART2 output value, however, doesn’t change until the first bit data is output after the entrance of the
clock, and remains unchanged from the value at the moment when the microcomputer detected the start
condition.
(2) The reception shift register is initialized, and the microcomputer starts reception by dealing with the clock
entered next as the first bit.
(3) The SCL wait output bit turns to “1”. This turns the SCL pin to “L” at the falling edge of the ninth bit of the
clock.
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