M30222 Datasheet, PDF (106/237 Pages) Mitsubishi Electric Semiconductor – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

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Specifications in this manual are tentative and subject to change
MITSUBISHI MICROCOMPUTERS
M30222 Group
Rev. G
Serial Communications
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
RxDi
1SP
SP
SP
2SP
PAR
PAR
disabled
PAR
enabled
Clock
synchronous
type
UART
Clock
synchronous type
UART (7 bits)
UART (8 bits)
UART (7 bits)
UART (9 bits)
Clock
synchronous type
UART (8 bits)
UART (9 bits)
UARTi receive register
0 0 0 0 0 0 0 D8
D7 D6 D5 D4 D3 D2 D1 D0
MSB/LSB conversion circuit
UARTi receive
buffer register
Address 03A616
Address 03A716
Address 03AE16
Address 03AF16
2SP
PAR
enabled
UART
SP
SP
PAR
1SP
PAR
disabled
Clock
synchronous
type
“0”
Data bus low-order bits
MSB/LSB conversion circuit
D8
D7 D6 D5 D4 D3 D2 D1 D0
UART (9 bits)
UART (8 bits)
UART (9 bits)
Clock synchronous
type
UARTi transmit
buffer register
Address 03A216
Address 03A316
Address 03AA16
Address 03AB16
UART (7 bits)
UART (8 bits)
Clock synchronous
type
UART (7 bits)
UARTi transmit register
SP: Stop bit
PAR: Parity bit
TxDi
Fig. 1.79. Block diagram of UARTi (i = 0,1) transmit/receive unit
RxD2
RxD data
reverse circuit
No reverse
Reverse
1SP
SP
SP
2SP
PAR
PAR
disabled
PAR
enabled
Clock
synchronous
type
Clock
synchronous type
UART
(7 bits)
UART
(8 bits)
UART(7 bits)
UART
UART
(9 bits)
PAR: Parity bit
Clock
synchronous type
UART
(8 bits)
UART
(9 bits)
UART2 receive register
0 0 0 0 0 0 0 D8
D7 D6 D5 D4 D3 D2 D1 D0
Logic reverse circuit + MSB/LSB conversion circuit
UART2 receive
buffer register
Address 037E16
Address 037F16
Data bus high-order bits
Data bus low-order bits
Logic reverse circuit + MSB/LSB conversion circuit
D8
D7 D6 D5 D4 D3 D2 D1 D0
2SP
PAR
enabled _UART
SP
SP
PAR
1SP
PAR
disabled
Clock
synchronous
type
“0”
UART
(9 bits)
UART
(8 bits)
UART
(9 bits)
Clock
synchronous type
UART
(7 bits)
UART
(8 bits)
Clock
synchronous type
UART(7 bits)
UART2 transmit register
Error signal output
disable
Error signal
output circuit
Error signal output
enable
No reverse
TxD data
reverse circuit
Reverse
SP: Stop bit
PAR: Parity bit
Fig. 1.80. Block diagram of UART2 transmit/receive unit
UART2 transmit
buffer register
Address 037A16
Address 037B16
TxD2
1-107