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PIC24FJ128GC010 Datasheet, PDF (93/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology | |||
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PIC24FJ128GC010 FAMILY
REGISTER 6-1: NVMCON: FLASH MEMORY CONTROL REGISTER
R/S-0, HC(1) R/W-0(1) R-0, HSC(1)
U-0
U-0
U-0
U-0
U-0
WR
WREN
WRERR
â
â
â
â
â
bit 15
bit 8
U-0
R/W-0(1)
U-0
â
ERASE
â
bit 7
U-0
R/W-0(1)
R/W-0(1)
R/W-0(1)
R/W-0(1)
â
NVMOP3(2) NVMOP2(2) NVMOP1(2) NVMOP0(2)
bit 0
Legend:
S = Settable bit
R = Readable bit
W = Writable bit
-n = Value at POR
â1â = Bit is set
HSC = Hardware Settable/Clearable bit
HC = Hardware Clearable bit
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3-0
WR: Write Control bit(1)
1 = Initiates a Flash memory program or erase operation; the operation is self-timed and the bit is
cleared by hardware once the operation is complete
0 = Program or erase operation is complete and inactive
WREN: Write Enable bit(1)
1 = Enables Flash program/erase operations
0 = Inhibits Flash program/erase operations
WRERR: Write Sequence Error Flag bit(1)
1 = An improper program or erase sequence attempt, or termination has occurred (bit is set
automatically on any set attempt of the WR bit)
0 = The program or erase operation completed normally
Unimplemented: Read as â0â
ERASE: Erase/Program Enable bit(1)
1 = Performs the erase operation specified by NVMOP<3:0> on the next WR command
0 = Performs the program operation specified by NVMOP<3:0> on the next WR command
Unimplemented: Read as â0â
NVMOP<3:0>: NVM Operation Select bits(1,2)
1111 = Memory bulk erase operation (ERASE = 1) or no operation (ERASE = 0)(3)
0011 = Memory word program operation (ERASE = 0) or no operation (ERASE = 1)
0010 = Memory page erase operation (ERASE = 1) or no operation (ERASE = 0)
0001 = Memory row program operation (ERASE = 0) or no operation (ERASE = 1)
Note 1:
2:
3:
These bits can only be reset on a Power-on Reset.
All other combinations of NVMOP<3:0> are unimplemented.
Available in ICSP⢠mode only; refer to the device programming specification.
ï£ 2012-2013 Microchip Technology Inc.
DS30009312B-page 93
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