PIC24FJ128GC010 Datasheet, PDF (411/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology

PIC24FJ128GC010 FAMILY
34.4 Program Verification and
Code Protection
PIC24FJ128GC010 family devices provide two compli-
mentary methods to protect application code from
overwrites and erasures. These also help to protect the
device from inadvertent configuration changes during
run time.
34.4.1 GENERAL SEGMENT PROTECTION
For all devices in the PIC24FJ128GC010 family, the
on-chip program memory space is treated as a single
block, known as the General Segment (GS). Code pro-
tection for this block is controlled by one Configuration
bit, GCP. This bit inhibits external reads and writes to
the program memory space. It has no direct effect in
normal execution mode.
Write protection is controlled by the GWRP bit in the
Configuration Word. When GWRP is programmed to
‘0’, internal write and erase operations to program
memory are blocked.
34.4.2 CODE SEGMENT PROTECTION
In addition to global General Segment protection, a
separate subrange of the program memory space can
be individually protected against writes and erases.
This area can be used for many purposes where a sep-
arate block of write and erase-protected code is
needed, such as bootloader applications. Unlike
common boot block implementations, the specially
protected segment in the PIC24FJ128GC010 family
devices can be located by the user anywhere in the
program space and configured in a wide range of sizes.
Code segment protection provides an added level of
protection to a designated area of program memory by
disabling the NVM safety interlock whenever a write or
erase address falls within a specified range. It does not
override General Segment protection controlled by the
GCP or GWRP bit. For example, if GCP and GWRP
are enabled, enabling segmented code protection for
the bottom half of program memory does not undo
General Segment protection for the top half.
The size and type of protection for the segmented code
range are configured by the WPFPx, WPEND, WPCFG
and WPDIS bits in Configuration Word 3. Code seg-
ment protection is enabled by programming the WPDIS
bit (= 0). The WPFPx bits specify the size of the seg-
ment to be protected by specifying the 512-word code
page that is the start or end of the protected segment.
The specified region is inclusive, therefore, this page
will also be protected.
The WPEND bit determines if the protected segment
uses the top or bottom of the program space as a
boundary. Programming WPEND (= 0) sets the bottom
of program memory (000000h) as the lower boundary
of the protected segment. Leaving WPEND unpro-
grammed (= 1) protects the specified page through the
last page of implemented program memory, including
the Configuration Word locations.
A separate bit, WPCFG, is used to protect the last page
of program space, including the Flash Configuration
Words. Programming WPCFG (= 0) protects the last
page in addition to the pages selected by the WPEND
and WPFP<6:0> bits’ setting. This is useful in circum-
stances where write protection is needed for both the
code segment in the bottom of the memory and the
Flash Configuration Words.
The various options for segment code protection are
shown in Table 34-2.
TABLE 34-2: CODE SEGMENT PROTECTION CONFIGURATION OPTIONS
Segment Configuration Bits
WPDIS WPEND WPCFG
Write/Erase Protection of Code Segment
1
x
x
No additional protection is enabled; all program memory protection is configured
by GCP and GWRP.
0
1
x
Addresses from the first address of the code page are defined by WPFP<6:0>
through the end of implemented program memory (inclusive);
erase/write-protected, including Flash Configuration Words.
0
0
1
Address, 000000h through the last address of the code page, is defined by
WPFP<6:0> (inclusive); write/erase protected.
0
0
0
Address, 000000h through the last address of code page, is defined by
WPFP<6:0> (inclusive); erase/write-protected and the last page, including Flash
Configuration Words, are erase/write-protected.
 2012-2013 Microchip Technology Inc.
DS30009312B-page 411