PIC24FJ128GC010 Datasheet, PDF (327/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology

PIC24FJ128GC010 FAMILY
REGISTER 23-2: RTCPWC: RTCC POWER CONTROL REGISTER⁽¹⁾
R/W-0
PWCEN
bit 15
R/W-0
PWCPOL
R/W-0
PWCPRE
R/W-0
PWSPRE
R/W-0
RTCLK1⁽²⁾
R/W-0
RTCLK0⁽²⁾
R/W-0
RTCOUT1
R/W-0
RTCOUT0
bit 8
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11-10
bit 9-8
bit 7-0
PWCEN: Power Control Enable bit
1 = Power control is enabled
0 = Power control is disabled
PWCPOL: Power Control Enable bit
1 = Power control is enabled
0 = Power control is disabled
PWCPRE: Power Control/Stability Prescaler bit
1 = PWC stability window clock is divide-by-2 of source RTCC clock
0 = PWC stability window clock is divide-by-1 of source RTCC clock
PWSPRE: Power Control Sample Prescaler bit
1 = PWC sample window clock is divide-by-2 of source RTCC clock
0 = PWC sample window clock is divide-by-1 of source RTCC clock
RTCLK<1:0>: RTCC Clock Source Select bits⁽²⁾
11 = External power line (60 Hz)
10 = External power line source (50 Hz)
01 = Internal LPRC Oscillator
00 = External Secondary Oscillator (SOSC)
RTCOUT<1:0>: RTCC Output Source Select bits
11 = Power control
10 = RTCC clock
01 = RTCC seconds clock
00 = RTCC alarm pulse
Unimplemented: Read as ‘0’
Note 1: The RTCPWC register is only affected by a POR.
2: When a new value is written to these register bits, the lower half of the MINSEC register should also be
written to properly reset the clock prescalers in the RTCC.
 2012-2013 Microchip Technology Inc.
DS30009312B-page 327