PIC24FJ128GC010 Datasheet, PDF (161/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology

PIC24FJ128GC010 FAMILY
9.3 Control Registers
The operation of the oscillator is controlled by three
Special Function Registers:
• OSCCON
• CLKDIV
• OSCTUN
The OSCCON register (Register 9-1) is the main con-
trol register for the oscillator. It controls clock source
switching and allows the monitoring of clock sources.
OSCCON is protected by a write lock to prevent inad-
vertent clock switches. See Section 9.4 “Clock
Switching Operation” for more information.
The CLKDIV register (Register 9-2) controls the
features associated with Doze mode, as well as the
postscaler for the FRC Oscillator.
The OSCTUN register (Register 9-3) allows the user to
fine-tune the FRC Oscillator over a range of approxi-
mately ±1.5%. It also controls the FRC self-tuning
features, described in Section 9.5 “FRC Active Clock
Tuning”.
REGISTER 9-1: OSCCON: OSCILLATOR CONTROL REGISTER
U-0
R-0
R-0
R-0
U-0
R/W-x⁽¹⁾
—
COSC2
COSC1
COSC0
—
NOSC2
bit 15
R/W-x⁽¹⁾
NOSC1
R/SO-0
CLKLOCK
bit 7
R/W-0
IOLOCK⁽²⁾
R-0⁽³⁾
LOCK
U-0
R/CO-0
R/W-0
R/W-0
—
CF
POSCEN SOSCEN
R/W-x⁽¹⁾
NOSC0
bit 8
R/W-0
OSWEN
bit 0
Legend:
R = Readable bit
-n = Value at POR
CO = Clearable Only bit
W = Writable bit
‘1’ = Bit is set
SO = Settable Only bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14-12
bit 11
bit 10-8
Unimplemented: Read as ‘0’
COSC<2:0>: Current Oscillator Selection bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with Postscaler and PLL module (FRCPLL)⁽⁴⁾
000 = Fast RC Oscillator (FRC)
Unimplemented: Read as ‘0’
NOSC<2:0>: New Oscillator Selection bits⁽¹⁾
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with Postscaler and PLL module (FRCPLL)⁽⁴⁾
000 = Fast RC Oscillator (FRC)
Note 1:
2:
3:
4:
Reset values for these bits are determined by the FNOSCx Configuration bits.
The state of the IOLOCK bit can only be changed once an unlocking sequence has been executed. In
addition, if the IOL1WAY Configuration bit is ‘1’, once the IOLOCK bit is set, it cannot be cleared.
This bit also resets to ‘0’ during any valid clock switch or whenever a non-PLL Clock mode is selected.
The default divisor of the postscaler is 2, which will generate a 4 MHz clock to the PLL module.
 2012-2013 Microchip Technology Inc.
DS30009312B-page 161