PIC24FJ128GC010 Datasheet, PDF (47/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology

PIC24FJ128GC010 FAMILY
4.2 Data Memory Space
Note:
This data sheet summarizes the features of
this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F Family Reference Manual”,
Section 45. “Data Memory with
Extended Data Space (EDS)” (DS39733).
The information in this data sheet
supersedes the information in the FRM.
The PIC24F core has a 16-bit wide data memory space,
addressable as a single linear range. The Data Space
(DS) is accessed using two Address Generation Units
(AGUs), one each for read and write operations. The
Data Space memory map is shown in Figure 4-3.
The 16-bit wide data addresses in the data memory
space point to bytes within the Data Space. This gives a
DS address range of 64 Kbytes or 32K words. The lower
half (0000h to 7FFFh) is used for implemented (on-chip)
memory addresses.
The upper half of data memory address space (8000h to
FFFFh) is used as a window into the Extended Data
Space (EDS). This allows the microcontroller to directly
access a greater range of data beyond the standard
16-bit address range. EDS is discussed in detail in
Section 4.2.5 “Extended Data Space (EDS)”.
The lower half of DS is compatible with previous PIC24F
microcontrollers without EDS. All PIC24FJ128GC010
family devices implement 8 Kbytes of data RAM in the
lower half of the DS, from 0800h to 27FFh.
4.2.1 DATA SPACE WIDTH
The data memory space is organized in
byte-addressable, 16-bit wide blocks. Data is aligned in
data memory and registers as 16-bit words, but all Data
Space Effective Addresses (EAs) resolve to bytes. The
Least Significant Bytes (LSBs) of each word have even
addresses, while the Most Significant Bytes (MSBs)
have odd addresses.
FIGURE 4-3:
DATA SPACE MEMORY MAP FOR PIC24FJ128GC010 FAMILY DEVICES
Lower 32 Kbytes
Data Space
MSB
Address
0001h
07FFh
0801h
1FFFh
2001h
27FFh
2801h
MSB
LSB
SFR Space
8 Kbytes Data RAM
LSB
Address
0000h
07FEh
0800h
1FFEh
2000h
27FEh
2800h
SFR
Space
Near
Data Space
EDS Page 0x1
(32 Kbytes)
7FFFh
8001h
Unimplemented
7FFEh
8000h
EDS Page 0x2
(32 Kbytes)
EDS Page 0x3
EPMP Memory Space
Upper 32 Kbytes
Data Space
EDS Window
FFFFh
FFFEh
Note: Memory areas are not shown to scale.
EDS Page 0x4
EDS Page 0x1FF
EDS Page 0x200
EDS Page 0x2FF
EDS Page 0x300
EDS Page 0x3FF
Program Space Visibility
Area to Access Lower
Word of Program Memory
Program Space Visibility
Area to Access Upper
Word of Program Memory
 2012-2013 Microchip Technology Inc.
DS30009312B-page 47