PIC24FJ128GC010 Datasheet, PDF (15/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology

PIC24FJ128GC010 FAMILY
1.6 Other Special Features
• Peripheral Pin Select (PPS): The Peripheral Pin
Select feature allows most digital peripherals to
be mapped over a fixed set of digital I/O pins.
Users may independently map the input and/or
output of any one of the many digital peripherals
to any one of the I/O pins.
• Communications: The PIC24FJ128GC010
family incorporates several different serial
communication peripherals to handle a range of
application requirements. There are two indepen-
dent I²C™ modules that support both Master and
Slave modes of operation. Devices also have,
through the PPS feature, four independent UARTs
with built-in IrDA^® encoders/decoders and two SPI
modules.
• CTMU Interface: In addition to their other analog
features, members of the PIC24FJ128GC010
family include the CTMU interface module. This
provides a convenient method for precision time
measurement and pulse generation, and can
serve as an interface for capacitive sensors.
• Enhanced Parallel Master/Parallel Slave Port:
This module allows rapid and transparent access
to the microcontroller data bus, and enables the
CPU to directly address external data memory. The
parallel port can function in Master or Slave mode,
accommodating data widths of 4, 8 or 16 bits, and
address widths of up to 23 bits in Master modes.
• Real-Time Clock and Calendar (RTCC): This
module implements a full-featured clock and
calendar with alarm functions in hardware, freeing
up timer resources and program memory space
for use of the core application.
• Data Signal Modulator (DSM): The Data Signal
Modulator (DSM) allows the user to mix a digital
data stream (the “modulator signal”) with a carrier
signal to produce a modulated output.
1.7 Details on Individual Family
Members
Devices in the PIC24FJ128GC010 family are available
in 64-pin and 100/121-pin packages. The general block
diagram for all devices is shown in Figure 1-1.
The devices are differentiated from each other in
six ways:
1. Flash program memory (64 Kbytes for
PIC24FJ64GC0XX devices and 128 Kbytes for
PIC24FJ128GC0XX devices).
2. Available I/O pins and ports (53 pins on 6 ports
for 64-pin devices and 85 pins on 7 ports for
100/121-pin devices).
3. Available Interrupt-on-Change Notification (ICN)
inputs (52 on 64-pin devices and 82 on
100/121-pin devices).
4. Available remappable pins (29 pins on 64-pin
devices and 44 pins on 100/121-pin devices).
5. Maximum available drivable LCD pixels (196 for
64-pin devices and 472 on 100/121-pin devices.)
6. Analog input channels for the pipeline A/D
Converter (29 channels for 64-pin devices and
50 channels for 100/121-pin devices).
All other features for devices in this family are identical.
These are summarized in Table 1-1 and Table 1-2.
A list of pin features available on the PIC24FJ128GC010
family devices, sorted by function, is shown in Table 1-3.
Note that this table shows the pin location of individual
peripheral features and not how they are multiplexed on
the same pin. This information is provided in the pinout
diagrams in the beginning of the data sheet. Multiplexed
features are sorted by the priority given to a feature, with
the highest priority peripheral being listed first.
 2012-2013 Microchip Technology Inc.
DS30009312B-page 15