PIC24FJ128GC010 Datasheet, PDF (100/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology

PIC24FJ128GC010 FAMILY
REGISTER 7-2: RCON2: RESET AND SYSTEM CONTROL REGISTER 2
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
U-0
U-0
r-0
R/CO-1
R/CO-1
R/CO-1
R/CO-0
—
—
—
r
VDDBOR⁽¹⁾ VDDPOR^(1,2) VBPOR^(1,3)
VBAT⁽¹⁾
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
CO = Clearable Only bit
W = Writable bit
‘1’ = Bit is set
r = Reserved bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-5
bit 4
bit 3
bit 2
bit 1
bit 0
Unimplemented: Read as ‘0’
Reserved: Maintain as ‘0’
VDDBOR: VDD Brown-out Reset Flag bit⁽¹⁾
1 = A VDD Brown-out Reset has occurred (set by hardware)
0 = A VDD Brown-out Reset has not occurred
VDDPOR: VDD Power-on Reset Flag bit^(1,2)
1 = A VDD Power-on Reset has occurred (set by hardware)
0 = A VDD Power-on Reset has not occurred
VBPOR: VBAT Power-on Reset Flag bit^(1,3)
1 = A VBAT POR has occurred (no battery connected to VBAT pin or VBAT power is below Deep Sleep
semaphore retention level, set by hardware)
0 = A VBAT POR has not occurred
VBAT: VBAT Flag bit⁽¹⁾
1 = A POR exit has occurred while power was applied to VBAT pin (set by hardware)
0 = A POR exit from VBAT has not occurred
Note 1:
2:
3:
This bit is set in hardware only; it can only be cleared in software.
Indicates a VDD POR. Setting the POR bit (RCON<0>) indicates a VCORE POR.
This bit is set when the device is originally powered up, even if power is present on VBAT.
TABLE 7-1: RESET FLAG BIT OPERATION
Flag Bit
Setting Event
TRAPR (RCON<15>) Trap Conflict Event
IOPUWR (RCON<14>) Illegal Opcode or Uninitialized W Register Access
CM (RCON<9>)
Configuration Mismatch Reset
EXTR (RCON<7>)
MCLR Reset
SWR (RCON<6>)
WDTO (RCON<4>)
RESET Instruction
WDT Time-out
SLEEP (RCON<3>)
PWRSAV #0 Instruction
DPSLP (RCON<10>) PWRSAV #0 Instruction while DSEN bit set
IDLE (RCON<2>)
PWRSAV #1 Instruction
BOR (RCON<1>)
POR, BOR
POR (RCON<0>)
POR
Note: All Reset flag bits may be set or cleared by the user software.
Clearing Event
POR
POR
POR
POR
POR
CLRWDT, PWRSAV Instruction, POR
POR
POR
POR
—
—
DS30009312B-page 100
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