PIC24FJ128GC010 Datasheet, PDF (359/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology

PIC24FJ128GC010 FAMILY
REGISTER 26-8: ADLnSTAT: A/D SAMPLE LIST n STATUS REGISTER (n = 0 to 3)
R-0
R-0
U-0
U-0
U-0
U-0
U-0
ADTACT
LBUSY
—
—
—
—
—
bit 15
U-0
—
bit 8
R-0
U-0
R/W-0, HS
U-0
U-0
U-0
U-0
U-0
ADTDLY
—
ADLIF⁽¹⁾
—
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
U = Unimplemented bit, read as ‘0’
W = Writable bit
HS = Hardware Settable bit
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13-8
bit 7
bit 6
bit 5
bit 4-0
ADTACT: A/D Trigger Event Active bit
1 = A trigger event is asserted
0 = A trigger event is not asserted
LBUSY: Trigger Control Busy bit
1 = The A/D is converting a sample entry associated with this list’s trigger
0 = The A/D is not busy with this trigger
Unimplemented: Read as ‘0’
ADTDLY: A/D Trigger Delayed Flag bit
1 = This trigger was delayed by a higher priority trigger
0 = This trigger was not delayed by a higher priority trigger
Unimplemented: Read as ‘0’
ADLIF: A/D Sample List Interrupt Event Flag bit⁽¹⁾
1 = An interrupt event (defined by ADLnCONH<14:13>) has occurred in Sample List n
0 = No interrupt event has occurred
Unimplemented: Read as ‘0’
Note 1: ADLIF is mirrored by the corresponding SLxIF flag bit in the ADSTATL register. Setting or clearing this bit
simultaneously changes the SLxIF.
 2012-2013 Microchip Technology Inc.
DS30009312B-page 359