PIC24FJ128GC010 Datasheet, PDF (344/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology

PIC24FJ128GC010 FAMILY
REGISTER 25-1: BUFCON0: INTERNAL VOLTAGE REFERENCE CONTROL REGISTER
R/W-0
U-0
R/W-0
R/W-0
U-0
U-0
U-0
BUFEN
—
BUFSIDL BUFSLP
—
—
—
bit 15
U-0
—
bit 8
U-0
R/W-0
U-0
U-0
U-0
U-0
R/W-0
R/W-0
—
BUFSTBY
—
—
—
—
BUFREF1⁽¹⁾ BUFREF0⁽¹⁾
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11-7
bit 6
bit 5-2
bit 1-0
BUFEN: Enable Buffer VREF Source bit
1 = Band gap and buffer are enabled
0 = Band gap and buffer are disabled
Unimplemented: Read as ‘0’
BUFSIDL: Buffer Stop in Idle bit
1 = Buffer is disabled in Idle mode
0 = Buffer works normally in Idle mode
BUFSLP: Buffer Sleep Enable bit
1 = Buffer is disabled in Sleep mode
0 = Buffer works normally in Sleep mode
Unimplemented: Read as ‘0’
BUFSTBY: Buffer Standby Enable bit
1 = Buffer in Low-Power Standby mode (output unknown or weak drive strength; allows quicker
start-up than clearing BUFEN)
0 = Buffer output works normally
Unimplemented: Read as ‘0’
BUFREF<1:0>: Internal Voltage Reference Select bits⁽¹⁾
11 = Reference output set at 3.072V
10 = Reference output set at 2.560V
01 = Reference output set at 2.048V
00 = Reference output set at 1.2V
Note 1: The BGBUF cannot “boost” the AVDD voltage to a higher level. Therefore, BUFREF<1:0> bits settings
higher than the applied AVDD level are considered invalid.
DS30009312B-page 344
 2012-2013 Microchip Technology Inc.