PIC24FJ128GC010 Datasheet, PDF (360/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology

PIC24FJ128GC010 FAMILY
REGISTER 26-9: ADLnPTR: A/D SAMPLE LIST n POINTER REGISTER (n = 0 to 3)
U-0
—
bit 15
R/W-0, HSC R/W-0, HSC R/W-0, HSC R/W-0, HSC R/W-0
ADNEXT6 ADNEXT5 ADNEXT4 ADNEXT3 ADNEXT2
R/W-0
ADNEXT1
R/W-0
ADNEXT0
bit 8
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
U = Unimplemented bit, read as ‘0’
W = Writable bit
HSC = Hardware Settable/Clearable bit
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14-8
bit 7-0
Unimplemented: Read as ‘0’
ADNEXT<6:0>: Pointer to Next Entry on Sample List to be Converted bits
This value is added to the start of the sample list to determine the ADTBLn register to be used for the
next trigger event.
Unimplemented: Read as ‘0’
REGISTER 26-10: ADTBLn: A/D SAMPLE TABLE ENTRY n REGISTER (n = 0 to 31)
R/W-0
R/W-0
U-0
U-0
U-0
U-0
U-0
UCTMU
DIFF
—
—
—
—
—
bit 15
U-0
—
bit 8
U-0
—
bit 7
R/W-0
ADCH6
R/W-0
ADCH5
R/W-0
ADCH4
R/W-0
ADCH3
R/W-0
ADCH2
R/W-0
ADCH1
R/W-0
ADCH0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13-7
bit 6-0
UCTMU: Enable CTMU During Entry Conversion bit
1 = CTMU is enabled during channel conversion for this entry
0 = CTMU is disabled during channel conversion for this entry
DIFF: Differential Inputs Select bit
1 = Analog inputs are sampled as differential pairs for this entry
0 = Analog inputs are sampled as single-ended for this entry
Unimplemented: Read as ‘0’
ADCH<6:0>: A/D Channel Entry Select bits
See Table 26-1 for a complete description.
DS30009312B-page 360
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