PIC24FJ128GC010 Datasheet, PDF (43/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology

PIC24FJ128GC010 FAMILY
REGISTER 3-2: CORCON: CPU CORE CONTROL REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 15
bit 8
U-0
U-0
—
—
bit 7
U-0
U-0
R/C-0
r-1
—
—
IPL3⁽¹⁾
r
U-0
U-0
—
—
bit 0
Legend:
R = Readable bit
-n = Value at POR
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
r = Reserved bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-4
bit 3
bit 2
bit 1-0
Unimplemented: Read as ‘0’
IPL3: CPU Interrupt Priority Level Status bit⁽¹⁾
1 = CPU Interrupt Priority Level is greater than 7
0 = CPU Interrupt Priority Level is 7 or less
Reserved: Read as ‘1’
Unimplemented: Read as ‘0’
Note 1: The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU Interrupt priority Level; see
Register 3-1 for bit description.
 2012-2013 Microchip Technology Inc.
DS30009312B-page 43