PIC24FJ128GC010 Datasheet, PDF (357/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology

PIC24FJ128GC010 FAMILY
REGISTER 26-7: ADLnCONL: A/D SAMPLE LIST n CONTROL LOW REGISTER
(n = 0 to 3)
R/W-0
SLEN
bit 15
R/W-0
SAMP⁽¹⁾
R/W-0
SLENCLR
R/W-0
SLTSRC4
R/W-0
SLTSRC3
R/W-0
SLTSRC2
R/W-0
SLTSRC1
R/W-0
SLTSRC0
bit 8
R/W-0
U-0
THSRC
—
bit 7
U-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
—
SLSIZE4
SLSIZE3
SLSIZE2
SLSIZE1
SLSIZE0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12-8
bit 7
bit 6-5
SLEN: A/D Trigger Control Enable bit
1 = Enabled: Selected trigger causes sampling of associated analog inputs
0 = Disabled: Selected trigger does NOT cause sampling of associated analog inputs
SAMP: A/D Manual Conversion Trigger bit⁽¹⁾
1 = Prepares to generate a trigger event (no generation yet)
0 = See SLTSRC<4:0> = 00000, 00001 and 00010 descriptions
SLENCLR: A/D Trigger Clear bit
1 = ADTEN is cleared by hardware after a trigger is generated by this sample list
0 = ADTEN is only cleared by software
SLTSRC<4:0>: Trigger Source Select bits
} ¹¹¹¹¹
...
=
Unimplemented,
do
not
use
10001
10000 = Timer1 A/D Trigger
01111 = Comparator 3
01110 = Comparator 2
01101 = Comparator 1
01100 = Input Capture 4
01011 = Input Capture 1
01010 = Output Compare 3
01001 = Output Compare 2
01000 = Output Compare 1
00111 = Internal Periodic Trigger Event; interval defined by the ADTMRPR register
00110 = CTMU
00101 = Timer2
00100 = Timer1 Sync
00011 = INT0
00010 = Manual Trigger Event: Triggers are generated on every A/D clock when SAMP = 0
00001 = Manual Trigger Event: Triggers are generated on every A/D clock when SAMP = 0 and
ACCONH<7> = 1
00000 = Manual Trigger Event: A single trigger is generated when SAMP is manually cleared in
firmware, creating a 1 to 0 transition
THSRC: Threshold List Select bit
1 = Source used for threshold compare is the Sample List Threshold register
0 = Source used for threshold compare is the Buffer register
Unimplemented: Read as ‘0’
Note 1: Applicable only with Manual Trigger modes (SLTSRC<4:0> = 00010, 00001 or 00000).
 2012-2013 Microchip Technology Inc.
DS30009312B-page 357