PIC24FJ128GC010 Datasheet, PDF (462/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology

PIC24FJ128GC010 FAMILY
Code Protection ................................................................ 411
Code Segment Protection ......................................... 411
Configuration Options ....................................... 411
Configuration Protection ........................................... 412
General Segment Protection..................................... 411
Comparator Voltage Reference ........................................ 387
Configuring................................................................ 387
Configuration Bits.............................................................. 399
Core Features ..................................................................... 13
CPU
Arithmetic Logic Unit (ALU)......................................... 44
Clocking Scheme ...................................................... 160
Control Registers ........................................................ 42
Core Registers ............................................................ 40
Programmer’s Model................................................... 39
CRC
Polynomials............................................................... 336
Setup Examples for 16 and 32-Bit Polynomials ........ 336
User Interface ........................................................... 336
CTMU
Measuring Capacitance ............................................ 389
Measuring Time ........................................................ 390
Pulse Delay and Generation ..................................... 390
Customer Change Notification Service ............................. 467
Customer Notification Service........................................... 467
Customer Support ............................................................. 467
D
Data Memory
Address Space............................................................ 47
Extended Data Space (EDS) ...................................... 74
Memory Map ............................................................... 47
Near Data Space ........................................................ 48
SFR Space.................................................................. 48
Software Stack ............................................................ 77
Space Organization, Alignment .................................. 48
Data Signal Modulator....................................................... 299
Data Signal Modulator (DSM) ........................................... 299
DC Characteristics
Comparator ............................................................... 435
Comparator Voltage Reference ................................ 435
CTMU Current Source .............................................. 434
Delta Current (BOR, WDT, DSBOR,
DSWDT, LCD) .................................................. 430
I/O Pin Input Specifications ....................................... 431
I/O Pin Output Specifications .................................... 432
Idle Current (IIDLE) .................................................... 428
Operating Current (IDD)............................................. 428
Power-Down Current (IPD) ........................................ 429
Program Memory ...................................................... 432
Temperature and Voltage Specifications .................. 427
Deep Sleep WDT .............................................................. 176
Development Support ....................................................... 413
Device Features
100/121-Pin................................................................. 17
64-Pin.......................................................................... 16
Direct Memory Access (DMA) Controller ............................ 14
Direct Memory Access Controller. See DMA.
DMA .................................................................................... 83
Channel Trigger Sources ............................................ 90
Peripheral Module Disable (PMD) .............................. 86
Summary of Operations .............................................. 84
Types of Data Transfers ............................................. 85
Typical Setup .............................................................. 86
Dual Operational Amplifier ................................................ 377
E
Electrical Characteristics
Absolute Maximum Ratings ...................................... 425
Band Gap (BGBUFn) Reference .............................. 433
Capacitive Loading on Output Pins .......................... 437
High/Low-Voltage Detect .......................................... 435
Internal Voltage Regulator ........................................ 433
Operational Amplifier ................................................ 436
Thermal Operating Conditions.................................. 426
Thermal Packaging Characteristics .......................... 426
V/F Graph ................................................................. 426
VBAT Operating Voltage............................................ 434
Enhanced Parallel Master Port (EPMP) ........................... 303
Enhanced Parallel Master Port. See EPMP.
EPMP
Key Features ............................................................ 303
Package Variations................................................... 303
Equations
16-Bit, 32-Bit CRC Polynomials................................ 336
Baud Rate Reload Calculation.................................. 251
Calculating the PWM Period..................................... 230
Calculation for Maximum PWM Resolution .............. 231
Estimating USB Transceiver
Current Consumption ....................................... 269
Relationship Between Device and SPIx
Clock Speed ..................................................... 247
UARTx Baud Rate with BRGH = 0 ........................... 258
UARTx Baud Rate with BRGH = 1 ........................... 258
Errata .................................................................................. 12
Extended Data Space (EDS) ............................................ 303
F
Flash Configuration Word Locations................................. 399
Flash Configuration Words ................................................. 46
Flash Program Memory ...................................................... 91
and Table Instructions ................................................ 91
Enhanced ICSP Operation ......................................... 92
Programming Algorithm .............................................. 94
Programming Operations............................................ 94
RTSP Operation ......................................................... 92
Single-Word Programming ......................................... 96
G
Getting Started
Basic Connection Requirements ................................ 33
External Oscillator Pins............................................... 37
ICSP Operation
Analog and Digital Pin Configuration.................. 38
Pins..................................................................... 36
Master Clear Reset (MCLR) Pin ................................. 34
Power Supply Pins...................................................... 34
Voltage Regulator (VCAP) ........................................... 35
H
High/Low-Voltage Detect (HLVD) ..................................... 397
DS30009312B-page 462
 2012-2013 Microchip Technology Inc.