PIC24FJ128GC010 Datasheet, PDF (464/472 Pages) Microchip Technology – 16-Bit Flash Microcontrollers with 12-Bit Pipeline A/D, Sigma-Delta A/D, USB On-The-Go and XLP Technology

PIC24FJ128GC010 FAMILY
Program Verification.......................................................... 411
Pulse-Width Modulation (PWM) Mode .............................. 229
Pulse-Width Modulation. See PWM.
PWM
Duty Cycle and Period .............................................. 230
R
Reader Response ............................................................. 468
Real-Time Clock and Calendar (RTCC)............................ 323
Reference Clock Output.................................................... 168
Register Maps
12-Bit Pipeline A/D Converter ..................................... 61
Analog Configuration .................................................. 60
Band Gap Buffer Interface .......................................... 70
Comparators ............................................................... 70
CPU Core.................................................................... 49
CTMU.......................................................................... 59
Cyclic Redundancy Check (CRC) ............................... 70
DAC ............................................................................ 60
Data Signal Modulator (DSM) ..................................... 69
Deep Sleep ................................................................. 73
DMA ............................................................................ 65
I²C ............................................................................... 55
ICN .............................................................................. 50
Input Capture .............................................................. 53
Interrupt Controller ...................................................... 51
LCD Controller ............................................................ 67
NVM ............................................................................ 73
Op Amp ....................................................................... 57
Output Compare ......................................................... 54
PADCFG1 (Pad Configuration) ................................... 59
Parallel Master/Slave Port .......................................... 69
Peripheral Module Disable (PMD) .............................. 73
Peripheral Pin Select (PPS) ........................................ 71
PORTA........................................................................ 57
PORTB........................................................................ 57
PORTC ....................................................................... 58
PORTD ....................................................................... 58
PORTE........................................................................ 58
PORTF ........................................................................ 59
PORTG ....................................................................... 59
Real-Time Clock and Calendar (RTCC)...................... 69
Sigma-Delta A/D ......................................................... 60
SPI .............................................................................. 56
System Control (Clock and Reset).............................. 72
Timers ......................................................................... 52
UART .......................................................................... 56
USB OTG .................................................................... 66
Registers
ACCONH (A/D Accumulator Control High) ............... 362
ACCONL (A/D Accumulator Control Low) ................ 362
ADCHITH (A/D Match Hit High) ................................ 363
ADCHITL (A/D Match Hit Low) ................................. 363
ADCON1 (A/D Control 1) .......................................... 350
ADCON2 (A/D Control 2) .......................................... 351
ADCON3 (A/D Control 3) .......................................... 352
ADLnCONH (A/D Sample List n Control High) ......... 355
ADLnCONL (A/D Sample List n Control Low)........... 357
ADLnMSEL0 (A/D Sample List n Multi-Channel
Select 0)............................................................ 366
ADLnMSEL1 (A/D Sample List n Multi-Channel
Select 1)............................................................ 366
ADLnMSEL2 (A/D Sample List n Multi-Channel
Select 2)............................................................ 365
ADLnMSEL3 (A/D Sample List n Multi-Channel
Select 3)............................................................ 365
DS30009312B-page 464
ADLnPTR (A/D Sample List n Pointer) ..................... 360
ADLnSTAT (A/D Sample List n Status) .................... 359
ADSTATH (A/D Status High) .................................... 353
ADSTATL (A/D Status Low) ..................................... 354
ADTBLn (A/D Sample Table Entry n) ....................... 360
ADTHnH (A/D Sample Table n Threshold
Value High)....................................................... 364
ADTHnL (A/D Sample Table n Threshold
Value Low)........................................................ 364
ALCFGRPT (Alarm Configuration) ........................... 328
ALMINSEC (Alarm Minutes and
Seconds Value) ................................................ 332
ALMTHDY (Alarm Month and Day Value) ................ 331
ALWDHR (Alarm Weekday and Hours Value).......... 331
AMPxCON (Op Amp x Control) ................................ 378
ANSA (PORTA Analog Function Selection) ............. 186
ANSB (PORTB Analog Function Selection) ............. 187
ANSC (PORTC Analog Function Selection) ............. 187
ANSD (PORTD Analog Function Selection) ............. 188
ANSE (PORTE Analog Function Selection) ............. 188
ANSF (PORTF Analog Function Selection).............. 189
ANSG (PORTG Analog Function Selection)............. 190
BDnSTAT Prototype (Buffer Descriptor n Status,
CPU Mode)....................................................... 273
BDnSTAT Prototype (Buffer Descriptor n Status,
USB Mode) ....................................................... 272
BUFCON0 (Internal Voltage Reference Control)...... 344
BUFCONx (Band Gap Buffers 1, 2 Control) ............. 345
CLKDIV (Clock Divider) ............................................ 163
CMSTAT (Comparator Status) ................................. 385
CMxCON (Comparator x Control,
Comparators 1-3) ............................................. 384
CORCON (CPU Control) .......................................... 109
CORCON (CPU Core Control) ................................... 43
CRCCON1 (CRC Control 1) ..................................... 338
CRCCON2 (CRC Control 2) ..................................... 339
CRCXORH (CRC XOR Polynomial, High Byte) ....... 340
CRCXORL (CRC XOR Polynomial, Low Byte)......... 339
CTMUCON1 (CTMU Control 1) ................................ 392
CTMUCON2 (CTMU Control 2) ................................ 393
CTMUICON (CTMU Current Control) ....................... 395
CVRCON (Comparator Voltage
Reference Control) ........................................... 388
CW1 (Flash Configuration Word 1)........................... 400
CW2 (Flash Configuration Word 2)........................... 402
CW3 (Flash Configuration Word 3)........................... 404
CW4 (Flash Configuration Word 4)........................... 406
DACxCON (DACx Control) ....................................... 376
DEVID (Device ID).................................................... 408
DEVREV (Device Revision)...................................... 408
DMACHn (DMA Channel n Control) ........................... 88
DMACON (DMA Engine Control)................................ 87
DMAINTn (DMA Channel n Interrupt)......................... 89
DSCON (Deep Sleep Control) .................................. 178
DSWAKE (Deep Sleep Wake-up Source) ................ 179
HLVDCON (High/Low-Voltage Detect Control) ........ 398
I2CxCON (I2Cx Control) ........................................... 252
I2CxMSK (I2Cx Slave Mode Address Mask) ............ 255
I2CxSTAT (I2Cx Status) ........................................... 254
ICxCON1 (Input Capture x Control 1)....................... 225
ICxCON2 (Input Capture x Control 2)....................... 226
IEC0 (Interrupt Enable Control 0) ............................. 122
IEC1 (Interrupt Enable Control 1) ............................. 124
IEC2 (Interrupt Enable Control 2) ............................. 126
IEC3 (Interrupt Enable Control 3) ............................. 127
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