80546KF Datasheet, PDF (86/138 Pages) Intel Corporation – 64-bit Intel Xeon Processor MP with up to 8MB L3 Cache

Pin Listing
Table 5-2. Pin Listing by Pin Number (cont’d)
Pin No.
Pin Name
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
AE2
AE3
AE4
AE5
AE6
AE7
AE8
AE9
AE10
AE11
D36#
D30#
V_CC
D29#
DBI1#
V_SS
D21#
D18#
V_CC
D4#
SM_ALERT#
SM_WP
DEP1#
DEP0#
V_{SSA_CACHE}
V_{CCA_CACHE}
Reserved
TESTHI6
V_SS
D58#
DEP4#
D44#
D42#
V_SS
Signal
Buffer Type
Direction
Source Sync Input/Output
Source Sync Input/Output
Power/Other
Source Sync Input/Output
Source Sync Input/Output
Power/Other
Source Sync Input/Output
Source Sync Input/Output
Power/Other
Source Sync Input/Output
SMBus
Output
SMBus
Input
Source Sync Input/Output
Source Sync Input/Output
Power/Other Input
Power/Other Input
Power/Other Input
Power/Other
Source Sync Input/Output
Source Sync Input/Output
Source Sync Input/Output
Source Sync Input/Output
Power/Other
Table 5-2. Pin Listing by Pin Number (cont’d)
Pin No.
Pin Name
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AE26
AE27
AE28
AE29
AE30
DBI2#
D35#
V_CC
DEP3#
DEP2#
DP3#
V_CC
DP1#
D28#
V_SS
D27#
D22#
V_CC
D19#
D16#
V_SS
SM_VCC
SM_VCC
Reserved
Signal
Buffer Type
Direction
Source Sync Input/Output
Source Sync Input/Output
Power/Other
Source Sync Input/Output
Source Sync Input/Output
Common
Clk
Input/Output
Power/Other
Common
Clk
Input/Output
Source Sync Input/Output
Power/Other
Source Sync Input/Output
Source Sync Input/Output
Power/Other
Source Sync Input/Output
Source Sync Input/Output
Power/Other
Power/Other
Power/Other
NOTES:
1. In systems utilizing the 64-bit Intel^® Xeon™ processor MP
with up to 8MB L3 cache, the system designer must pull-up
these signals to the processor V_TT.
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64-bit Intel^® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet