80546KF Datasheet, PDF (117/138 Pages) Intel Corporation – 64-bit Intel Xeon Processor MP with up to 8MB L3 Cache

Features
Table 8-12. SMBus Thermal Sensor Status Register
Bit
Name
Reset State
7 (MSB)
6
5
4
BUSY
RESERVED
RESERVED
RHIGH
N/A
RESERVED
RESERVED
0
3
RLOW
0
2
1
0 (LSB)
OPEN
RESERVED
RESERVED
0
RESERVED
RESERVED
Function
If set, indicates that the device’s analog to digital
converter is busy.
Reserved for future use
Reserved for future use
If set, indicates the processor core thermal diode
high temperature alarm has activated.
If set, indicates the processor core thermal diode
low temperature alarm has activated.
If set, indicates an open fault in the connection to
the processor core diode.
Reserved for future use.
Reserved for future use.
8.4.6.4 Configuration Register
The Configuration Register controls the operating mode (stand-by vs. auto-convert) of the SMBus
thermal sensor. Table 8-13 shows the format of the Configuration Register. If the RUN/STOP bit is
set (high) then the thermal sensor immediately stops converting and enters stand-by mode. The
thermal sensor will still perform analog to digital conversions in stand-by mode when it receives a
one-shot command. If the RUN/STOP bit is clear (low), then the thermal sensor enters auto-
conversion mode.
This register is accessed by using the thermal sensor Command Register. The RC command
register is used for read commands and the WC command register is used for write commands. See
Table 8-10.
Table 8-13. SMBus Thermal Sensor Configuration Register
Bit
7 (MSB)
6
5:0
Name
MASK
RUN/STOP
RESERVED
Reset State
0
0
RESERVED
Function
Mask SM_ALERT# bit. Clear the bit to allow
interrupts via SM_ALERT# and allow the thermal
sensor to respond to the ARA command when
an alarm is active. Set the bit to disable interrupt
mode. The bit is not used to clear the state of the
SM_ALERT# output. An ARA command may not
be recognized if the mask is enabled.
Stand-by mode control bit. If set, the device
immediately stops converting, and enters stand-
by mode. If cleared, the device converts in either
one-shot mode or automatically updates on a
timed basis.
Reserved for future use.
64-bit Intel^® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet
117