80546KF Datasheet, PDF (37/138 Pages) Intel Corporation – 64-bit Intel Xeon Processor MP with up to 8MB L3 Cache

Electrical Specifications
2.11 AGTL+ Front Side Bus Specifications
Termination resistors are not required for most AGTL+ signals because they are integrated into the
processor silicon.
Valid high and low levels are determined by the input buffers which compare a signal’s voltage
with a reference voltage called GTLREF.
Table 2-19 lists the GTLREF specifications. GTLREF should be generated on the system board
using high-precision voltage divider circuits.
Table 2-19. AGTL+ Bus Voltage Definitions
Symbol
Parameter
GTLREF
Bus Reference
Voltage
Termination
R_TT
Resistance
(pull-up)
Termination
R_L
Resistance
(pull-down)
COMP0
COMP Resistance
SLEW_CTRL
SLEW_CTRL
Resistance
Min
0.98 * (0.63 * V_TT)
40.5
360
49.4
49.4
Typ
0.63 * V_TT
45
450
49.9
49.9
Max
Units Notes
1.02 * (0.63 * V_TT) V
1,2,6
49.5
Ω
3
540
50.4
50.4
Ω
4
Ω
5
Ω
7
NOTES:
1. The tolerances for this specification have been stated generically to enable system designers to calculate the
minimum values across the range of V_TT.
2. GTLREF is generated from V_TT on the baseboard by a voltage divider of 1% resistors.
3. R_TT is the on-die termination resistance measured at V_OL of the AGTL+ output driver.
4. R_L is the on-die termination resistance for improved noise margin and signal integrity.
5. The COMP0 resistor is provided by the baseboard with 1% resistors.
6. The V_TT referred to in these specifications refers to instantaneous V_TT.
7. The SLEW_CTRL resistor is provided by the baseboard with 1% resistors.
2.12
Front Side Bus AC Specifications
The processor front side bus timings specified in this section are defined at the processor core
silicon and are thus not measurable at the processor pins.
See Section 6 for processor pin signal definitions.
Table 2-20 through Table 2-27 list the AC specifications associated with the processor front side
bus.
All AGTL+ timings are referenced to GTLREF for both ‘0’ and ‘1’ logic levels unless otherwise
specified.
64-bit Intel^® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet
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