80546KF Datasheet, PDF (124/138 Pages) Intel Corporation – 64-bit Intel Xeon Processor MP with up to 8MB L3 Cache

Features
8.4.9.6.10 Processor Electronic Signature
Offset 4D - 54h contains a 64-bit identification number. Intel does not guarantee that each
processor will have a unique value in this field.
8.4.9.7
Feature Data
This section provides information on key features that the platform may need to understand
without powering on the processor.
8.4.9.7.11 Processor Core Feature Flags
Offset 74 - 77h contains a copy of results in EDX[31:0] from Function 1 of the CPUID instruction.
These details provide instruction and feature support by product family. A decode of these bits is
found in the AP-485 Intel^® Processor Identification and CPUID Instruction application note.
8.4.9.7.12 Processor Feature Flags
Offset 78h provides additional feature information from the processor. This field is defined as
follows:
Table 8-17. Offset 78h Definitions
Bit
Definition
7
Reserved
6
Serial signature (set if there is a serial signature at offset 4D - 54h)
5
Electronic signature present (set if there is a electronic signature at 4D - 54h)
4
Thermal Sense Device present (set if an SMBus thermal sensor on package)
3
Reserved
2
OEM EEPROM present (set if there is a scratch ROM at offset 80 - FFh)
1
Core VID present (set if there is a VID provided by the processor)
0
L3 Cache present (set if there is a level 3 cache on the processor)
8.4.9.8
8.4.9.7.13 Additional Processor Feature Flags
All bits of this field are reserved at this time. The field resides at offset 79 - 7Bh.
Other Data
Addresses 7E - 7F are listed as reserved.
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64-bit Intel^® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet