80546KF Datasheet, PDF (103/138 Pages) Intel Corporation – 64-bit Intel Xeon Processor MP with up to 8MB L3 Cache

Thermal Specifications
7.2.4
7.2.5
7.2.6
7.2.7
PROCHOT# Signal Pin
An external signal, PROCHOT# (processor hot), is asserted when the processor die temperature
has reached its factory configured trip point. If the Thermal Monitor is enabled (note that the
Thermal Monitor must be enabled for the processor to be operating within specification), the TCC
will be active when PROCHOT# is asserted. The processor can be configured to generate an
interrupt upon the assertion or de-assertion of PROCHOT#. Refer to the Intel Architecture
Software Developer’s Manual and the Processor BIOS Writers Guide for specific register and
programming details.
PROCHOT# is designed to assert at or a few degrees higher than maximum T_CASE (as specified by
the thermal profile) when dissipating TDP power, and cannot be interpreted as an indication of
processor case temperature. This temperature delta accounts for processor package, lifetime, and
manufacturing variations and attempts to ensure the Thermal Control Circuit is not activated below
maximum T_CASE when dissipating TDP power. There is no defined or fixed correlation between
the PROCHOT# trip temperature, the case temperature, or the thermal diode temperature. Thermal
solutions must be designed to the processor specifications and cannot be adjusted based on
experimental measurements of T_CASE, PROCHOT#, or Tdiode on random processor samples.
FORCEPR# Signal Pin
The FORCEPR# (force power reduction) input can be used by the platform to force the processor
to activate the TCC. If the Thermal Monitor is enabled, the TCC will be activated upon the
assertion of the FORCEPR# signal. The TCC will remain active until the system deasserts
FORCEPR#. FORCEPR# is an asynchronous input. FORCEPR# can be used to thermally protect
other system components. To use the voltage regulator (VR) as an example, when the FORCEPR#
pin is asserted, the TCC in the processor will activate, reducing the current consumption of the
processor and the corresponding temperature of the VR.
It should be noted that assertion of FORCEPR# does not automatically assert PROCHOT#. As
mentioned previously, the PROCHOT# signal is asserted when a high temperature situation is
detected. A minimum pulse width of 500 microseconds is recommended when FORCEPR# is
asserted by the system. Sustained activation of the FORCEPR# pin may cause noticeable platform
performance degradation.
THERMTRIP# Signal Pin
Regardless of whether or not Thermal Monitor or Thermal Monitor 2 is enabled, in the event of a
catastrophic cooling failure, the processor will automatically shut down when the silicon has
reached an elevated temperature (refer to the THERMTRIP# definition in Table 6-1). At this point,
the system bus signal THERMTRIP# will go active and stay active as described in Table 6-1.
THERMTRIP# activation is independent of processor activity and does not generate any bus
cycles. If THERMTRIP# is asserted, processor core voltage (V_CC) and cache voltage (V_CACHE)
must be removed within the timeframe defined in Table 2-23 and Figure 2-15. Intel also
recommends removal of V_TT.
T_CONTROL and Fan Speed Reduction
T_CONTROL is a temperature specification based on a temperature reading from the thermal sensor.
The value for T_CONTROL will be calibrated in manufacturing and configured for each processor.
The T_CONTROL temperature for a given processor can be obtained by reading the
64-bit Intel^® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet
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