80546KF Datasheet, PDF (47/138 Pages) Intel Corporation – 64-bit Intel Xeon Processor MP with up to 8MB L3 Cache

Electrical Specifications
Figure 2-13. TAP Valid Delay Timing Waveform
TCK
V
Tx Ts Th
Signal
V Valid
Tx = T63: TDO Clock to Output Delay
Ts = T61: TDI, TMS Setup Time
Th = T62: TDI, TMS Hold Time
V = 0.5 * V_TT
Figure 2-14. Test Reset (TRST#), Async GTL+ Input, and PROCHOT# Timing Waveform
V
T_q
Tq
=
T64 (TRST# Pulse Width), V = 0.5 * V_TT
T38 (PROCHOT# Pulse Width), V = GTLREF
Figure 2-15. THERMTRIP# Power Down Sequence
T_A
THERMTRIP#
V_CC, V_CACHE
T_A = T39: THERMTRIP# assertion until V_CC and V_CACHE removal
64-bit Intel^® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet
47