80546KF Datasheet, PDF (112/138 Pages) Intel Corporation – 64-bit Intel Xeon Processor MP with up to 8MB L3 Cache

Features
Table 8-2. Processor Information ROM Format (Sheet 3 of 3)
Offset/Section
# of
Bits
Function
Part Number Data:
38 - 3Eh 56 Processor Part Number
3F - 4Ch 112 Reserved
4D - 54h
64
Processor Electronic
Signature
55 - 6Eh 208 Reserved
6Fh 8 Checksum
Thermal Ref. Data:
70h 8 Reserved
71 - 72h 16 Reserved
73h 8 Reserved
Feature Data:
74 - 77h
32
Processor Core Feature
Flags
78h 8 Processor Feature Flags
79-7Bh
24
Additional Processor
Feature Flags
7Ch 8 Reserved
7Dh 8 Checksum
Other Data:
7E - 7Fh 16 Reserved
Notes
Seven 8-bit ASCII characters
Reserved
64-bit identification number
Reserved
1 byte checksum
Reserved
Reserved
Reserved
From CPUID function 1, EDX contents
[7] = Reserved
[6] = Serial Signature
[5] = Electronic Signature Present
[4] = Thermal Sense Device Present
[3] = Reserved
[2] = OEM EEPROM Present
[1] = Core VID Present
[0] = L3 Cache Present
All bits Reserved
Reserved
1 byte checksum
Reserved
8.4.2
Scratch EEPROM
Also available in the memory component on the processor SMBus is an EEPROM which may be
used for other data at the system or processor vendor’s discretion. The data in this EEPROM, once
programmed, can be write-protected by asserting the active-high SM_WP signal. This signal has a
weak pull-down (10 kW) to allow the EEPROM to be programmed in systems with no
implementation of this signal. The Scratch EEPROM resides in the upper half of the memory
component (addresses 80 - FFh). The lower half comprises the Processor Information ROM
(addresses 00 - 7Fh), which is permanently write-protected by Intel.
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64-bit Intel^® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet