80546KF Datasheet, PDF (34/138 Pages) Intel Corporation – 64-bit Intel Xeon Processor MP with up to 8MB L3 Cache

Electrical Specifications
4. Undershoot is defined as the absolute value of the minimum voltage.
5. Ringback Margin is defined as the absolute voltage difference between the maximum Rising Edge Ringback
and the maximum Falling Edge Ringback.
6. Threshold Region is defined as a region entered around the crossing point voltage in which the differential
receiver switches. It includes input threshold hysteresis.
7. The crossing point must meet the absolute and relative crossing point specifications simultaneously.
8. V_Havg can be measured directly using “Vtop” on Agilent scopes and “High” on Tektronix scopes.
Table 2-13. BSEL[1:0], VID[5:0], and CVID[3:0] DC Specifications
Symbol
R_ON
I_OL
I_LO
V_TOL
Parameter
Buffer On Resistance
Max Pin Current
Output Leakage Current
Voltage Tolerance
Max
60
8
200
3.3 * 1.05
Unit
Ω
mA
µA
V
Notes
1
2
3
NOTES:
1. These parameters are not tested and are based on design simulations.
2. Leakage to V_SS with pin held at 2.5V.
3. Represents the maximum allowable termination voltage.
Table 2-14. VIDPWRGD DC Specifications
Symbol
Parameter
Min
Max
Unit
Figure
Notes
V_IL
Input Low Voltage
0.0
0.30
V
2-19
V_IH
Input High Voltage
0.90
V_TT
V
2-19
34
64-bit Intel^® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet