80546KF Datasheet, PDF (36/138 Pages) Intel Corporation – 64-bit Intel Xeon Processor MP with up to 8MB L3 Cache

Electrical Specifications
Table 2-17. GTL+ and AGTL+ Asynchronous Signal Group DC Specifications
Symbol
Parameter
Min
V_IL
Input Low Voltage
0
V_IH
Input High Voltage GTLREF + (10% * V_TT)
V_OH
Output High Voltage
I_OL
Output Low Current
I_LI
Input Leakage Current
N/A
I_LO
Output Leakage Current
R_on
Buffer On Resistance
8
Max
GTLREF - (10% * V_TT)
V_TT
V_TT
50
± 200
± 200
12
Unit Notes
V
2
V
3,4,6
V
1,4,6
mA
7
µA
8
µA
9
Ω
5
NOTES:
1. All outputs are open-drain.
2. V_IL is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.
3. V_IH is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.
4. V_IH and V_OH may experience excursions above V_TT. However, input signal drivers must comply with the signal
quality specifications in Section 3.
5. Refer to the Processor Signal Integrity Models for I/V characteristics.
6. The V_TT referred to in these specifications refers to instantaneous V_TT.
7. The maximum output current is based on maximum current handling capability of the buffer and is not
specified into the test load.
8. Leakage to V_SS with pin held at V_TT
9. Leakage to V_TT with pin held at 300 mV.
Table 2-18. SMBus Signal Group DC Specifications
Symbol
Parameter
Min
Max
V_IL
V_IH
V_OL
I_OL
I_LI
I_LO
C_SMB
Input Low Voltage
-0.30
0.30 * SM_VCC
Input High Voltage 0.70 * SM_VCC
3.465
Output Low Voltage
0
0.400
Output Low Current
N/A
3.0
Input Leakage Current
N/A
± 10
Output Leakage Current
N/A
± 10
SMBus Pin Capacitance
15.0
Unit
V
V
V
mA
µA
µA
pF
Notes ^1,2
3
NOTES:
1. These parameters are based on design characterization and are not tested.
2. All DC specifications for the SMBus signal group are measured at the processor pins.
3. Platform designers may need this value to calculate the maximum loading of the SMBus and to determine
maximum rise and fall times for SMBus signals.
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64-bit Intel^® Xeon™ Processor MP with up to 8MB L3 Cache Datasheet