MC68HC908GP20 Datasheet, PDF (95/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Table 5-1. Mux Channel Select
ADCH4 ADCH3 ADCH2 ADCH1 ADCH0
Input Select
0
0
0
0
0
PTB0/AD0
0
0
0
0
1
PTB1/AD1
0
0
0
1
0
PTB2/AD2
0
0
0
1
1
PTB3/AD3
0
0
1
0
0
PTB4/AD4
0
0
1
0
1
PTB5/AD5
0
0
1
1
0
PTB6/AD6
0
0
1
1
1
PTB7/AD7
↓
↓
↓
↓
↓
Reserved
1
1
0
1
1
Reserved
1
1
1
0
0
Reserved
1
1
1
0
1
V_REFH
1
1
1
1
0
V_SSAD
1
1
1
1
1
ADC power off
NOTE: If any unused channels are selected, the resulting ADC conversion will be unknown
or reserved.
5.8.2 ADC Data Register
One 8-bit result register, ADC data register (ADR), is provided. This
register is updated each time an ADC conversion completes.
Address: $0003D
Bit 7
6
5
4
3
2
1
Bit 0
Read: AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 5-3. ADC Data Register (ADR)
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor
Advance Information
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