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MC68HC908GP20 Datasheet, PDF (76/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers
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•
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5
4
STACKING 3
ORDER 2
1
CONDITION CODE REGISTER
ACCUMULATOR
INDEX REGISTER (LOW BYTE)*
PROGRAM COUNTER (HIGH BYTE)
PROGRAM COUNTER (LOW BYTE)
1
2
3 UNSTACKING
4
ORDER
5
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$00FF DEFAULT ADDRESS ON RESET
*High byte of index register is not stacked.
Figure 4-4. Interrupt Stacking Order
After every instruction, the CPU checks all pending interrupts if the I bit
is not set. If more than one interrupt is pending when an instruction is
done, the highest priority interrupt is serviced first. In the example shown
in Figure 4-5, if an interrupt is pending upon exit from the interrupt
service routine, the pending interrupt is serviced before the LDA
instruction is executed.
Advance Information
76
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor