MC68HC908GP20 Datasheet, PDF (293/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

An internal reset clears the SIM counter (see 19.5 SIM Counter), but an
external reset does not. Each of the resets sets a corresponding bit in
the SIM reset status register (SRSR). (See 19.8 SIM Registers.)
19.4.1 External Pin Reset
The RST pin circuit includes an internal pullup device. Pulling the
asynchronous RST pin low halts all processing. The PIN bit of the SIM
reset status register (SRSR) is set as long as RST is held low for a
minimum of 67 CGMXCLK cycles, assuming that neither the POR nor
the LVI was the source of the reset. See Table 19-2 for details. Figure
19-4 shows the relative timing.
Reset Type
POR/LVI
All others
Table 19-2. PIN Bit Set Timing
Number of Cycles Required to Set PIN
4163 (4096 + 64 + 3)
67 (64 + 3)
CGMOUT
RST
IAB PC
VECT H VECT L
Figure 19-4. External Reset Timing
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor
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