MC68HC908GP20 Datasheet, PDF (354/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

The two TIM channels (per timer) are programmable independently as
input capture or output compare channels. If a channel is configured as
input capture, then an internal pullup device may be enabled for that
channel. (See 16.5.3 Port C Input Pullup Enable Register.)
INTERNAL
TCLK
INTERNAL
BUS CLOCK
TSTOP
TRST
PRESCALER
16-BIT COUNTER
16-BIT COMPARATOR
TMODH:TMODL
PRESCALER SELECT
PS2
PS1
PS0
CHANNEL 0
16-BIT COMPARATOR
TCH0H:TCH0L
16-BIT LATCH
CHANNEL 1
16-BIT COMPARATOR
TCH1H:TCH1L
16-BIT LATCH
ELS0B ELS0A
CH0F
MS0A
MS0B
ELS1B ELS1A
MS1A
CH1F
TOF
TOIE
INTER-
RUPT
LOGIC
TOV0
CH0MAX
DMA0S
CH0IE
TOV1
CH1MAX
DMA1S
CH1IE
PORT
LOGIC
INTER-
RUPT
LOGIC
PORT
LOGIC
INTER-
RUPT
LOGIC
T[1,2]CH0
T[1,2]CH1
Figure 22-1. TIM Block Diagram
Figure 22-2 summarizes the timer registers.
NOTE:
References to either timer 1 or timer 2 may be made in the following text
by omitting the timer number. For example, TSC may generically refer
to both T1SC and T2SC.
Advance Information
354
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor