MC68HC908GP20 Datasheet, PDF (130/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

7.6.3 PLL Multiplier Select Register High
The PLL multiplier select register high (PMSH) contains the
programming information for the high byte of the modulo feedback
divider.
Address:
Read:
Write:
Reset:
$0038
Bit 7
0
0
6
5
0
0
0
0
= Unimplemented
4
3
2
1
Bit 0
0
MUL11 MUL10 MUL9 MUL8
0
0
0
0
0
Figure 7-6. PLL Multiplier Select Register High (PMSH)
MUL11–MUL8 — Multiplier Select Bits
These read/write bits control the high byte of the modulo feedback
divider that selects the VCO frequency multiplier N. (See 7.4.3 PLL
Circuits and 7.4.6 Programming the PLL.) A value of $0000 in the
multiplier select registers configures the modulo feedback divider the
same as a value of $0001. Reset initializes the registers to $0040 for
a default multiply value of 64.
NOTE: The multiplier select bits have built-in protection such that they cannot
be written when the PLL is on (PLLON = 1).
PMSH[7:4] — Unimplemented Bits
These bits have no function and always read as logic 0s.
Advance Information
130
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor