MC68HC908GP20 Datasheet, PDF (315/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

20.4 Pin Name Conventions and I/O Register Addresses
The text that follows describes the SPI. The SPI I/O pin names are SS
(slave select), SPSCK (SPI serial clock), CGND (clock ground), MOSI
(master out slave in), and MISO (master in/slave out). The SPI shares
four I/O pins with four parallel I/O ports.
The full names of the SPI I/O pins are shown in Table 20-1. The generic
pin names appear in the text that follows.
Table 20-1. Pin Name Conventions
SPI Generic
Pin Names:
MISO
MOSI
SS
SPSCK CGND
Full SPI
Pin Names:
SPI
PTD1/MISO
PTD2/MOSI
PTD0/SS
PTD3/SPSCK
V_SS
20.5 Functional Description
Figure 20-1 summarizes the SPI I/O registers and Figure 20-2 shows
the structure of the SPI module.
Addr.
$0010
$0011
$0012
Register Name
Read:
SPI Control Register
(SPCR)
Write:
Reset:
Read:
SPI Status and Control
Register (SPSCR)
Write:
Reset:
Read:
SPI Data Register
(SPDR)
Write:
Reset:
Bit 7
SPRIE
0
SPRF
0
R7
T7
6
DMAS
5
SPMSTR
0
ERRIE
1
OVRF
0
0
R6
R5
T6
T5
= Unimplemented
4
3
CPOL CPHA
0
MODF
1
SPTE
0
1
R4
R3
T4
T3
Unaffected by reset
2
SPWOM
0
MODFEN
0
R2
T2
Figure 20-1. SPI I/O Register Summary
1
SPE
0
SPR1
0
R1
T1
Bit 0
SPTIE
0
SPR0
0
R0
T0
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor
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