MC68HC908GP20 Datasheet, PDF (233/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

16.5.2 Data Direction Register C
Data direction register C (DDRC) determines whether each port C pin is
an input or an output. Writing a logic 1 to a DDRC bit enables the output
buffer for the corresponding port C pin; a logic 0 disables the output
buffer.
Address:
Read:
Write:
Reset:
$0006
Bit 7
0
6
5
4
3
2
1
DDRC6 DDRC5 DDRC4 DDRC3 DDRC2 DDRC1
0
0
0
0
0
0
0
= Unimplemented
Figure 16-10. Data Direction Register C (DDRC)
Bit 0
DDRC0
0
DDRC6–DDRC0 — Data Direction Register C Bits
These read/write bits control port C data direction. Reset clears
DDRC6–DDRC0, configuring all port C pins as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
NOTE: Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
Figure 16-11 shows the port C I/O logic.
NOTE: For those devices packaged in a 40-pin dual in-line package, set DDRC6
and DDRC5 to a 1 to configure PTC5 and PTC6 as outputs.
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor
Advance Information
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