MC68HC908GP20 Datasheet, PDF (68/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Upon exit from stop mode, the system clocks begin running after an
oscillator stabilization delay. A 12-bit stop recovery counter inhibits the
system clocks for 4096 CGMXCLK cycles after the reset or external
interrupt.
The short stop recovery bit, SSREC, in the configuration register
controls the oscillator stabilization delay during stop recovery. Setting
SSREC reduces stop recovery time from 4096 CGMXCLK cycles to 32
CGMXCLK cycles.
NOTE: Use the full stop recovery time (SSREC = 0) in applications that use an
external crystal.
Advance Information
68
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor