MC68HC908GP20 Datasheet, PDF (290/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Addr. Register Name
Bit 7
6
5
4
3
Read:
$FE00
SIM
Break
Status
Register
(SBSR)
Write:
R
R
R
R
R
Reset: 0
0
0
0
0
Note: Writing a logic 0 clears SBSW.
Read: POR
PIN
COP
ILOP
ILAD
$FE01
SIM
Reset
Status
Register
(SRSR)
Write:
POR: 1
0
0
0
0
Read:
$FE02
SIM Upper Byte Address
Register (SUBAR)
Write:
R
R
R
R
R
Reset:
Read:
$FE03
SIM Break Flag Control
Register (SBFCR)
Write:
BCFE
R
R
R
R
Reset: 0
Read: IF6
IF5
IF4
IF3
IF2
$FE04
Interrupt Status Register 1
(INT1)
Write:
R
R
R
R
R
Reset: 0
0
0
0
0
Read: IF14
IF13
IF12
IF11
IF10
$FE05
Interrupt Status Register 2
(INT2)
Write:
R
R
R
R
R
Reset: 0
0
0
0
0
Read: 0
0
0
0
0
$FE06
Interrupt Status Register 3
(INT3)
Write:
R
R
R
R
R
Reset: 0
0
0
0
0
= Unimplemented
Figure 19-2. SIM I/O Register Summary
2
1
SBSW
R
NOTE
0
0
MODRST LVI
0
0
R
R
R
R
IF1
0
R
R
0
0
IF9
IF8
R
R
0
0
0
IF16
R
R
0
0
Bit 0
R
0
0
0
R
R
0
R
0
IF7
R
0
IF15
R
0
Advance Information
290
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor