MC68HC908GP20 Datasheet, PDF (222/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

16.2 Introduction
Thirty-three (33) bidirectional input-output (I/O) pins form five parallel
ports. All I/O pins are programmable as inputs or outputs. All individual
bits within port A, port C, and port D are software configurable with pullup
devices if configured as input port bits. The pullup devices are
automatically and dynamically disabled when a port bit is switched to
output mode.
NOTE:
Connect any unused I/O pins to an appropriate logic level, either V_DD or
V_SS. Although the I/O ports do not require termination for proper
operation, termination reduces excess current consumption and the
possibility of electrostatic damage.
Addr.
$0000
$0001
Register Name
Read:
Port A Data Register
(PTA)
Write:
Reset:
Read:
Port B Data Register
(PTB)
Write:
Reset:
Bit 7
PTA7
PTB7
6
PTA6
PTB6
5
4
3
PTA5 PTA4 PTA3
Unaffected by reset
PTB5 PTB4 PTB3
Unaffected by reset
$0002
$0003
Read:
Port C Data Register
(PTC)
Write:
Reset:
Read:
Port D Data Register
(PTD)
Write:
Reset:
0
PTD7
PTC6
PTD6
PTC5 PTC4 PTC3
Unaffected by reset
PTD5 PTD4 PTD3
Unaffected by reset
Read:
$0004
Data Direction Register A
(DDRA)
Write:
Reset:
DDRA7
0
DDRA6
0
DDRA5
0
= Unimplemented
DDRA4
0
DDRA3
0
Figure 16-1. I/O Port Register Summary
2
PTA2
PTB2
PTC2
PTD2
DDRA2
0
1
PTA1
PTB1
PTC1
PTD1
DDRA1
0
Bit 0
PTA0
PTB0
PTC0
PTD0
DDRA0
0
Advance Information
222
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor