MC68HC908GP20 Datasheet, PDF (132/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

7.6.5 PLL VCO Range Select Register
NOTE: PMRS may be called PVRS on other HC08 derivatives.
The PLL VCO range select register (PMRS) contains the programming
information required for the hardware configuration of the VCO.
Address: $003A
Bit 7
6
5
4
3
2
1
Read:
Write:
Reset:
VRS7
0
VRS6
1
VRS5
0
VRS4
0
VRS3
0
VRS2
0
VRS1
0
Figure 7-8. PLL VCO Range Select Register (PMRS)
Bit 0
VRS0
0
VRS7–VRS0 — VCO Range Select Bits
These read/write bits control the hardware center-of-range linear
multiplier L which, in conjunction with E (See 7.4.3 PLL Circuits, 7.4.6
Programming the PLL, and 7.6.1 PLL Control Register.), controls
the hardware center-of-range frequency, f_VRS. VRS7–VRS0 cannot
be written when the PLLON bit in the PCTL is set. (See 7.4.7 Special
Programming Exceptions.) A value of $00 in the VCO range select
register disables the PLL and clears the BCS bit in the PLL control
register (PCTL). (See 7.4.8 Base Clock Selector Circuit and 7.4.7
Special Programming Exceptions.). Reset initializes the register to
$40 for a default range multiply value of 64.
NOTE:
The VCO range select bits have built-in protection such that they cannot
be written when the PLL is on (PLLON = 1) and such that the VCO clock
cannot be selected as the source of the base clock (BCS = 1) if the VCO
range select bits are all clear.
The PLL VCO range select register must be programmed correctly.
Incorrect programming can result in failure of the PLL to achieve lock.
Advance Information
132
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor