MC68HC908GP20 Datasheet, PDF (338/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

20.14 I/O Registers
Three registers control and monitor SPI operation:
• SPI control register (SPCR)
• SPI status and control register (SPSCR)
• SPI data register (SPDR)
20.14.1 SPI Control Register
The SPI control register:
• Enables SPI module interrupt requests
• Configures the SPI module as master or slave
• Selects serial clock polarity and phase
• Configures the SPSCK, MOSI, and MISO pins as open-drain
outputs
• Enables the SPI module
Address: $0010
Bit 7
Read:
SPRIE
Write:
Reset: 0
6
DMAS
5
SPMSTR
0
1
= Unimplemented
4
CPOL
0
3
2
1
CPHA SPWOM SPE
1
0
0
Figure 20-13. SPI Control Register (SPCR)
Bit 0
SPTIE
0
SPRIE — SPI Receiver Interrupt Enable Bit
This read/write bit enables CPU interrupt requests generated by the
SPRF bit. The SPRF bit is set when a byte transfers from the shift
register to the receive data register. Reset clears the SPRIE bit.
1 = SPRF CPU interrupt requests
0 = SPRF CPU interrupt requests
Advance Information
338
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor