MC68HC908GP20 Datasheet, PDF (230/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

16.4.2 Data Direction Register B
Data direction register B (DDRB) determines whether each port B pin is
an input or an output. Writing a logic 1 to a DDRB bit enables the output
buffer for the corresponding port B pin; a logic 0 disables the output
buffer.
Address: $0005
Bit 7
6
5
4
3
2
1
Read:
DDRB7
Write:
DDRB6
DDRB5
DDRB4
DDRB3
DDRB2
DDRB1
Reset: 0
0
0
0
0
0
0
Figure 16-7. Data Direction Register B (DDRB)
Bit 0
DDRB0
0
DDRB7–DDRB0 — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears
DDRB7–DDRB0], configuring all port B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
NOTE: Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 16-8 shows the port B I/O logic.
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
READ PTB ($0001)
DDRBx
PTBx
PTBx
Figure 16-8. Port B I/O Circuit
Advance Information
230
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor