MC68HC908GP20 Datasheet, PDF (90/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

5.4.2 Voltage Conversion
NOTE:
When the input voltage to the ADC equals V_REFH, the ADC converts the
signal to $FF (full scale). If the input voltage equals V_SSAD, the ADC
converts it to $00. Input voltages between V_REFH and V_SSAD are a
straight-line linear conversion. All other input voltages will result in $FF,
if greater than V_REFH.
Input voltage should not exceed the analog supply voltages.
5.4.3 Conversion Time
Conversion starts after a write to the ADSCR. One conversion will take
between 16 and 17 ADC clock cycles. The ADIVx and ADICLK bits
should be set to provide a 1-MHz ADC clock frequency.
Conversion time = ^{16-17 ADC cycles}
ADC frequency
Number of bus cycles = conversion time x bus frequency
5.4.4 Conversion
In continuous conversion mode, the ADC data register will be filled with
new data after each conversion. Data from the previous conversion will
be overwritten whether that data has been read or not. Conversions will
continue until the ADCO bit is cleared. The COCO/IDMAS bit is set after
the first conversion and will stay set until the next write of the ADC status
and control register or the next read of the ADC data register.
In single conversion mode, conversion begins with a write to the
ADSCR. Only one conversion occurs between writes to the ADSCR.
5.4.5 Accuracy and Precision
The conversion process is monotonic and has no missing codes.
Advance Information
90
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor