MC68HC908GP20 Datasheet, PDF (304/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Interrupt Status
Register 3
Address: $FE06
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
0
0
I16
I15
Write: R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
R = Reserved
Figure 19-14. Interrupt Status Register 3 (INT3)
Bits 7–2 — Always read 0
I16–I15 — Interrupt Flags 16–15
These flags indicate the presence of an interrupt request from the
source shown in Table 19-3.
1 = Interrupt request present
0 = No interrupt request present
19.6.2 Reset
All reset sources always have equal and highest priority and cannot be
arbitrated.
19.6.3 Break Interrupts
The break module can stop normal program flow at a software-
programmable break point by asserting its break interrupt output. (See
Section 22. Timer Interface Module (TIM).) The SIM puts the CPU into
the break state by forcing it to the SWI vector location. Refer to the break
interrupt subsection of each module to see how each module is affected
by the break state.
Advance Information
304
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor