MC68HC908GP20 Datasheet, PDF (367/406 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

TSTOP — TIM Stop Bit
This read/write bit stops the TIM counter. Counting resumes when
TSTOP is cleared. Reset sets the TSTOP bit, stopping the TIM
counter until software clears the TSTOP bit.
1 = TIM counter stopped
0 = TIM counter active
NOTE: Do not set the TSTOP bit before entering wait mode if the TIM is required
to exit wait mode.
TRST — TIM Reset Bit
Setting this write-only bit resets the TIM counter and the TIM
prescaler. Setting TRST has no effect on any other registers. Counting
resumes from $0000. TRST is cleared automatically after the TIM
counter is reset and always reads as logic 0. Reset clears the TRST
bit.
1 = Prescaler and TIM counter cleared
0 = No effect
NOTE: Setting the TSTOP and TRST bits simultaneously stops the TIM counter
at a value of $0000.
PS2–PS0 — Prescaler Select Bits
These read/write bits select either the TCLK pin or one of the seven
prescaler outputs as the input to the TIM counter as Table 22-2 shows.
Reset clears the PS[2:0] bits.
Table 22-2. Prescaler Selection
PS2–PS0
000
001
010
011
100
101
110
111
TIM Clock Source
Internal bus clock ÷1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
Not available
MC68HC908GP20 — Rev 2.1
Freescale Semiconductor
Advance Information
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