HD64F7047F50 Datasheet, PDF (755/766 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Item
Page Revisions (See Manual for Details)
15.7 CAN Bus Interface 479
A bus transceiver IC is necessary to connect this LSI to a CAN
bus. A Renesas HA13721 transceiver IC and its compatible
products are recommended.
Figure 15.16 High-Speed 479 Amended.
Interface Using HA13721
15.8 Usage Notes
479 to Amended.
482
16.3.2 Timer Control
Register (TCNR)
488 The timer control register (TCNR) controls the enabling or
disabling of interrupt requests, selects the enabling or disabling
of register access, and selects counter operation or halting.
Figure 16.5 Example of 498 Amended.
PWM Waveform
Generation
16.7.2 Notes for MMT
Operation
507, Descriptions added.
508
16.8.5 Usage Notes
513 1. To set the POE pin as a level-detective pin, a high level
signal must be firstly input to the POE pin.
2. To clear bits POE4F, POE5F, and POE6F to 0, read the
ICSR2 register. Clear bits, which are read as 1, to 0, and
write 1 to the other bits in the register.
17.2 Precautions for Use 536 Description 3 to 5 added.
19.1 Features
549 • Reprogramming capability
 For details, see section 25, Electrical Characteristics.
Figure 19.10 Erase/Erase- 568
Verify Flowchart
*1
Erase start
SWE bit ← 1
Wait (tSSWE) µs
n←1
19.13 Notes on Flash
Memory Programming
and Erasing
571 Added.
Rev. 2.00, 09/04, page 713 of 720