HD64F7047F50 Datasheet, PDF (541/766 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

TPDR
TCNT
2Td
H'0000
PCIO
(counter clear
input)
Figure 16.6 Example of TCNT Counter Clearing
Toggle Output Synchronized with PWM Cycle: In the operating modes, output can be toggled
synchronously with the PWM carrier cycle. When outputting the PWM cycle, the pin function
controller (PFC) should be used to set the PCIO pin as an output(when set to output). An example
of the toggle output waveform is shown in figure 16.7.
PWM cycle output is toggled according to the TCNT count direction. The toggle output pin is
PCIO (when set to output). PCIO outputs 1 when TCNT is counting up, and 0 when counting
down.
TPDR
TCNT
2Td
H'0000
PCIO pin
(toggle output)
Figure 16.7 Example of Toggle Output Waveform Synchronized with PWM Cycle
Settings for A/D Start-Conversion Requests: Requests to start A/D conversion can be set up to
be issued when TCNT matches TPDR or 2Td. When the start requests are set up for issue when
TCNT matches TPDR, A/D conversion will start at the center of the PWM pulse (the peak value
of the TCNT counter). When the start requests are set up for issue when TCNT matches 2Td, A/D
conversion will start on the edge of the PWM pulse (the minimum value of the TCNT counter).
Rev. 2.00, 09/04, page 499 of 720