HD64F7047F50 Datasheet, PDF (678/766 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

25.3.8 Serial Communication Interface (SCI)Timing
Table 25.10 shows serial communication interface timing.
Table 25.10 Serial Communication Interface Timing
Conditions: V_CC = 5.0 V ±0.5 V, AV_CC = 5.0 V ±0.5 V, V_SS = PLLV_SS = AV_SS = 0 V, T_a = –20°C to
+75°C (Standard product)*, T_a = –40°C to +85°C (Wide temperature-range
product)*.
Item
Symbol Min
Max
Unit
Figures
Input clock cycle
t_scyc
4
—
t_pcyc
Figure 25.17
Input clock cycle (clock sync) t
6
scyc
—
t
pcyc
Input clock pulse width
t
0.4
0.6
t
sckw
scyc
Input clock rise time
t
—
sckr
1.5
t
pcyc
Input clock fall time
t_sckf
—
1.5
t_pcyc
Transmit data delay time
t_TxD
—
100
ns
Figure 25.18
Received data setup time
t_RxS
100
—
ns
Received data hold time
t_RxH
100
—
ns
Note: * See page 2 for correspondence of the standard product, wide temperature-range
product, and product model name.
[Operating precautions]
The inputs and outputs are asynchronous in asynchronous mode, but as shown in figure 25.17, the
received data is considered to have been changed at CK clock rise (two-clock intervals). The
transmit signals change with a reference of CK clock rise (two-clock intervals).
SCK2 to SCK4
t_sckw
V_IH
V_IH
V_IL
t_sckr
V_IH
V_IL
t_scyc
Figure 25.17 SCI Input Timing
t_sckf
V_IH
V_IL
Rev. 2.00, 09/04, page 636 of 720