HD64F7047F50 Datasheet, PDF (313/766 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

10.7.16 Contention between Overflow/Underflow and Counter Clearing
If overflow/underflow and counter clearing occur simultaneously, the TCFV/TCFU flag in TSR is
not set and TCNT clearing takes precedence.
Figure 10.83 shows the operation timing when a TGR compare match is specified as the clearing
source, and when H'FFFF is set in TGR.
Pφ
TCNT input
clock
TCNT
Counter clear
signal
TGF
H'FFFF
H'0000
TCFV
Disabled
Figure 10.83 Contention between Overflow and Counter Clearing
Rev. 2.00, 09/04, page 271 of 720