HD64F7047F50 Datasheet, PDF (166/766 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Repeat Mode: Performs the transfer of one byte, one word, or one longword for each activation.
Either the transfer source or transfer destination is designated as the repeat area. Table 8.3 lists the
register information in repeat mode.
From 1 to 256 transfers can be specified. Once the specified number of transfers have ended, the
initial state of the transfer counter and the address register specified as the repeat area is restored,
and transfer is repeated. In repeat mode the transfer counter value does not reach H'00, and
therefore CPU interrupts cannot be requested when DISEL = 0.
Table 8.3 Repeat Mode Register Functions
Register
DTMR
DTCRAH
DTCRAL
DTIAR
DTSAR
DTDAR
Values Written Back upon a Transfer Information Write
Function
When DTCRA is other than 1 When DTCRA is 1
Operation mode
control
DTMR
DTMR
Transfer count save DTCRAH
DTCRAH
Transfer count
DTCRAL – 1
DTCRAH
Initial address
(Not written back)
(Not written back)
Transfer source
address
Increment/decrement/fixed
(DTS = 0) Increment/
decrement/fixed
(DTS = 1) DTIAR
Transfer destination Increment/decrement/fixed
address
(DTS = 0) DTIAR
(DTS = 1) Increment/
decrement/fixed
DTSAR
or
DTDAR
Repeat area
Transfer
DTDAR
or
DTSAR
Figure 8.7 Memory Mapping in Repeat Mode
Rev. 2.00, 09/04, page 124 of 720