HD64F7047F50 Datasheet, PDF (632/766 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

22.4.2 Bypass Mode
Bypass mode can be used to bypass this LSI in a boundary-scan test. Bypass mode is entered by
transferring B'1111 to SDIR. In bypass mode, SDBPR is connected to TDI and TDO.
22.4.3 H-UDI Reset
The H-UDI can be reset as follows.
• By holding the TRST signal at 0
• When TRST = 1, by inputting at least five TCK clock cycles while TMS = 1
• By entering hardware standby mode
• By setting the pin function controller (PFC) not for the H-UDI
22.5 Usage Notes
• The registers are not initialized in software standby mode. If TRST is set to 0 in software
standby mode, bypass mode will be entered.
• The frequency of TCK must be lower than that of the peripheral module clock (Pφ). For
details, see section 25, Electrical Characteristics.
• In serial data transfer, data input/output starts with the LSB. Figure 22.5 shows serial data
input/output.
• If the H-UDI serial transfer sequence is disrupted, a TRST reset must be executed. Transfer
should then be retried, regardless of the transfer operation.
• The TDO output timing is from the rise of TCK.
• In the Shift-IR state, the lower 2 bits of the output data from TDO (the IR status word) may not
always be 01.
• If more than 32 bits are serially transferred, serial data exceeding 32 bits output from TDO
should be ignored.
• Ensure that the TDI pin is not in the high-impedance state.
Rev. 2.00, 09/04, page 590 of 720